Mountain View, CA February 26, 1996 Synplicity, Inc., developers of fast, easy-to-use logic synthesis products for designers using hardware description languages (HDLs), today announced major enhanced functionality and support for eight additional FPGA and CPLD devices, with its latest release of Synplify. Synplify is a complete synthesis solution that takes designs written in VHDL and Verilog HDL and converts them into small, high performance CPLD and FPGA netlists for popular programmable logic devices. Synplify supports Lucent Technologies' (formerly AT&T Microelectronics) ORCA devices for the first time with this release by adding custom technology mappers for ORCA 1C, ORCA 2C, and has added new custom technology mappers for six other devices including Actel 1200XL and 3200DX; Altera MAX5000, MAX9000 and FLEX10000; and Xilinx XC5200 devices, bringing the total to 16 device families supported by Synplify.
ORCA Device Support
Synplicity is committed to providing designers with support for the latest device architectures. Alliances with FPGA vendors has enabled Synplicity to take advantage of the individual device features to deliver optimal design results. Fred Koons, strategic marketing manager for FPGAs at Lucent Technologies, has been working closely with Synplicity to finalize the certification of their ORCA 1C and ORCA 2C mappers. "We are impressed with Synplify and are excited to have the Lucent Technologies' ORCA devices supported in this release. Its ease of use, excellent run times and superior quality results make it a great tool for FPGA designers." Synplify maps directly to the four, five, and six input look-up tables in the ORCA cells, and to all of the complex flip-flops configurations. Synplify also automatically uses the global set and reset routing resource available in ORCA devices.
Actel
In this release, Synplify provides support for Actel's latest FPGA devices, the Actel 1200XL and 3200DX Integrator Series. Synplicity has enhanced the performance and area results for Actel's other devices by twenty percent over the previous release, and has added detailed delay reports so designers can find their critical paths. Synplify automatically reduces the size of the design by making use of the clock buffer resources for resets, greatly reducing the number of buffers used in the design, and eliminating the need to instantiate a CLKINT manually. Gervais Fong, CAE relations manager from Actel said that, "Synplicity's fast run times combined with their improved quality of results enables designers to increase their productivity to design with Actel's latest generation of FPGAs, the Actel 1200XL and 3200DX Integrator Series."
Altera
With this release, Synplify maps to all the Altera MAX 9000 and FLEX 10000 parts, including the largest Altera FLEX 10000 parts. "The increasing density of programmable logic is mandating the use of Verilog and VHDL based synthesis," stated Bob Beachler, AlteraÆs director of strategic marketing and communications. "SynplicityÆs timely support of AlteraÆs newest, highest density product families gives engineers the synthesis technology they need to design with these high density devices."
Synplify compiles HDL designs using special device-specific optimization, mapping and module generation techniques developed by Synplicity, and manages design hierarchy automatically. Other synthesis programs require designers to synthesize small chunks of logic and tie them all together at the top level of hierarchy. With Synplify, once designs files are listed, Synplify will synthesize all the logic together with just a click of the "Run" button, with no manual intervention, memory, or runtime problems.
Xilinx
With this release, Synplicity is announcing its support of the Xilinx XC5200 devices with a custom technology mapper that maps directly to the Xilinx look-up tables and XBLOX components. For the XC4000 family, Synplicity is introducing a special algorithm called Direct Synthesis Technology (DST). In previous versions of Synplify, Synplicity instantiated XBLOX components for XC4000 adders, counters, comparators, and other high level macros. With DST, Synplify compiles directly to Xilinx's relatively placed macros (RPM), and has removed all instantiations of XBLOX components, eliminating the user's need to run XBLOX and saving the user a significant amount of time in the design cycle. Also, using DST, Synplify improves the area and timing results by optimizing across module boundaries and by using the extra gates that would have been left behind with the XBLOX macros. "Synplify helps the designer build chips, not stand alone modules," stated Alisa Yaffa, president of Synplicity.
Terry Johnson, manager of strategic partnerships at Xilinx, stressed the benefit of fast run times for the complete design flow for Xilinx users. "By directly compiling to device specific features including carry logic, XBLOX is removed from the design flow and the user can go from HDL to place and route in much less time." Synplicity is investigating Direct Synthesis Technology for the other Xilinx device families.
Other Enhancements
When appropriate to the architecture and when there are high fanout nets, Synplify automatically replicates logic or performs buffering to improve performance. Synplify allows user control of the fanout limit to allow performance and area tradeoffs in the design. Synplify also offers complete support for instantiating vendor macros where desired, such as memories.
Synplicity's Synplify synthesis tool accepts Verilog and VHDL descriptions and produces optimized implementations for programmable devices from vendors including Actel, Altera, Cypress, Lucent Technologies, QuickLogic, and Xilinx. Designed to be extremely easy to use, Synplify is also extremely fast; benchmarks show it runs 10 to 100 times faster than competing tools, while producing designs with comparable or better performance and area results. It includes a built-in editor that gives direct feedback for fast design debug. Synplify runs on both Windows and Unix platforms.
Synplify carries a U.S. list price of $8,000 on a PC and starts at $16,000 on workstations. Synplify is available directly from Synplicity and through its authorized U.S. and international distributors. Synplify-Lite, a subset of Synplify that provides Verilog and VHDL synthesis to one FPGA architecture, is available at half the cost of Synplify.
Founded in February 1994, Synplicity, Inc. delivers the benefits of logic synthesis to programmable device designers by developing fast, easy, affordable tools based entirely on the company's own technology. Synplicity products support industry-standard design languages (VHDL and Verilog), run on popular computer platforms (Windows, '95, and NT; Unix), and support leading manufacturers including Actel, Altera, Cypress, Lucent Technologies, QuickLogic, and Xilinx. The company is located at 465 Fairchild Drive, Suite 115, Mountain View, Calif., 94043. Phone: (415) 961- 4962, Fax: (415) 961-4974, Email: info@synplicity.com, Web: http://www.synplicity.com.
Synplicity, the Synplicity 'S', 'Y', 'N' blocks logo, Synplify, and Synplify-Lite are trademarks or registered trademarks of Synplicity, Inc. All other brands or products are the trademarks or registered trademarks of their owners.
For more information
contact:
Alisa Yaffa
Synplicity, Inc.
415-961-4962 Tel
415-961-4974 Fax
alisa@synplicity.com